Perl Jobs
Browse 21 exciting jobs hiring in Perl now. Check out companies hiring such as Intel, Hewlett Packard Enterprise, Micron in San Francisco, Chandler, Huntington Beach.
Intel is hiring a CPU Physical Design Engineer to lead RTL-to-GDS implementation and signoff for E-Core/Atom microprocessors, optimizing power, frequency, and area.
HPE is hiring a VLSI Engineer II in Sunnyvale to develop and verify RTL modules and testbenches, leveraging SystemVerilog and verification methodologies to drive ASIC/subsystem validation.
Senior Design Engineer role at Micron to lead functional verification efforts for non-volatile memory designs using SystemVerilog, UVM, assertions and automation.
Lead the design and RTL implementation of GPU power-management blocks at Samsung Austin, translating microarchitecture into robust, production-ready hardware and partnering closely with SoC and firmware teams.
Lead technical development and program execution for mobile mNAND products at Micron’s Boise site, driving design, debug, and qualification from concept to production.
Senior technical leader responsible for architecting and driving end-to-end ATE test solutions for complex silicon programs to ensure robust bring-up, qualification, and high-volume production.
Lead the design and delivery of Axiom SL regulatory reporting solutions as the Technical Lead for a major financial client based in Jersey City.
Intel Foundry is hiring a Physical Design Methodology and Automation Engineer to drive TFM development, regression automation, and physical design optimizations for high-performance SoC and IP implementations.
Lead development of verification tooling and CI infrastructure to accelerate High-Speed IO ASIC verification for NVIDIA's GPU teams.
Senior engineer to build and own SPICE simulation flows and Virtuoso-based CAD automation that accelerate analog/mixed-signal design productivity and improve simulation-to-silicon correlation.
Live Nation is hiring a Team Lead Developer (SAP ICM) to drive SAP design, development, ETL and BI reporting while leading cross-functional technical delivery.
Become a key contributor on Intel's DTP team building and automating density/fill solutions and PDK fill components to ensure manufacturability at advanced semiconductor nodes.
Cadence is hiring a Senior Principal IC Design Verification Application Engineer to lead customer-facing verification solutions using Xcelium and Verisium, solving complex verification challenges for top semiconductor customers.
Lead Applications Engineer to provide front-line technical expertise and customer-facing support for Cadence’s Palladium emulation and Protium FPGA prototyping platforms.
Solidigm is looking for a hands-on Design Automation Infrastructure & DevOps Engineer to own Linux/EDA environment operations, automation, and validation for engineering workflows in Rancho Cordova, CA.
GSSR Inc. is hiring a Programmer Analyst contractor to instrument code with assertions, analyze C++ stack traces, and drive remediation efforts across development teams.
KBR is hiring a Software Engineer to develop and maintain PHP/Python applications and tooling for the USGS EROS Center, supporting satellite and airborne imagery systems.
Lead platform engineering for Athena Coordinator Core, driving DevSecOps-led product delivery, cloud operations, and healthcare data integration from a hybrid Boston location.
Marvell is hiring a Senior Staff Analog Layout SRAM Engineer in Burlington, VT to lead SRAM memory layout and sign-off verification efforts and drive automation and quality across custom memory designs.
Experienced ATE/Test development lead needed at NVIDIA to drive Advantest 93K-based test programs, silicon bring-up, and production test strategies for LPU server products.
Help improve Intel silicon quality as an early-career DFT Design Engineer working on RTL DFT features, test strategies, and manufacturing test content for SoC and IP blocks.
