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Senior Density Fill Development Engineer

Job Details:

Job Description: 

Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.

Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.

Life at Intel: https://jobs.intel.com/en/life-at-intel

Join Intel's Design Technology Platform (DTP) organization and become an integral part of a highly skilled team driving the development of cutting-edge technologies. As an EDA Tools Software Engineer, you will design, develop, test, and debug software tools and methodologies that directly support Intel's hardware product design and manufacturing processes. Your work will enable design teams to innovate faster, meet complex manufacturability constraints, and deliver industry-leading products to market. By contributing to Intel's advanced process technologies, you will play a pivotal role in achieving leadership in design automation and fostering a culture of innovation.

Key responsibilities include but are not limited to: 

  • Design, develop, and debug Fill components of Process Design Kits (PDKs)
  • Provide algorithmic solutions using tools such as Calibre, ICV, and Pegasus to address density deficiencies and ensure manufacturability compliance. 
  • Collaborate with process developers, design rule owners, and end users to define requirements and implement state-of-the-art solutions. - Automate workflows to enhance efficiency, accuracy, and deployment across design teams. 
  • Develop comprehensive test cases and systems to validate software tools and ensure seamless integration with various design methodologies. 
  • Innovate and drive advancements in EDA tools and methodologies to meet the evolving needs of Intel's technology ecosystem. 
  • Partner with cross-functional teams and external EDA vendors to define and implement new tool features and methodologies. 
  • Maintain documentation, including training materials and user guides, to support customers and ensure robust deployment.

 
The candidate should exhibit the following traits:

  • Proven track record of collaborating across multiple internal and external teams to deliver optimal solutions. 
  • Exceptional analytical and problem-solving skills with the ability to address cross-disciplinary challenges. 
  • Strong written and verbal communication skills, with the ability to present complex technical concepts clearly. 
  • Leadership experience driving innovation, process improvements, or cross-functional initiatives. 
     

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience. 


Minimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 8+ years of relevant experience, Master's degree with 6+ years of relevant experience, OR PhD with 3+ years of relevant experience. in: 

  • Proficiency in scripting languages such as Python, Tcl, or Perl for automation 
  • Expertise in EDA tools, including Calibre, ICV, or Pegasus, with strong skills in developing and debugging rule decks (e.g., SVRF/TVF, PXL, PVL/PVTCL). 
  • Solid understanding of semiconductor device physics, process technology, and design rules. 
  • Experience in developing algorithmic solutions for physical design challenges in advanced manufacturing nodes. 
  • Strong knowledge of Unix/Linux platforms and computing environments.

Preferred Qualifications:

  • Experience with advanced physical verification techniques, including DRC, and density/fill modules. 
  • Familiarity with custom layout tools such as Cadence Virtuoso or Synopsys Custom Designer. 
  • Deep understanding of technology scaling challenges and their impact on physical design rules. 

In this role, you will have a unique opportunity to make a lasting impact by enabling Intel's success in the competitive semiconductor landscape. Take the next step in your career and join a team where your expertise will help shape the future of technology innovation.

Interview Tips: https://www.intel.com/content/www/us/en/jobs/hiring.html

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, Austin

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Average salary estimate

$217090 / YEARLY (est.)
min
max
$149600K
$284580K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

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CULTURE VALUES
Inclusive & Diverse
Rise from Within
Mission Driven
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Customer-Centric
BENEFITS & PERKS
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave
FUNDING
SENIORITY LEVEL REQUIREMENT
TEAM SIZE
EMPLOYMENT TYPE
Full-time, hybrid
DATE POSTED
April 4, 2026
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