Perfect Opportunity for Career Growth:
This role is ideally suited for recent graduates and early-career professionals passionate about building expertise in Design for Test (DFT). No previous DFT experience is required – we're seeking motivated individuals with a genuine interest in evolving their careers in this specialized field.
The Role and Impact:
As a DFT Design Engineer, you will play a vital role in shaping the quality and performance of Intel's silicon products. You will contribute to the development of cutting-edge technologies by designing and verifying robust Design for Test (DFT) features that ensure manufacturability and reliability. Your work will directly impact Intel's ability to deliver high-quality products to market quickly, meeting both performance and quality objectives. This position offers the opportunity to collaborate with cross-functional teams, influence design methodologies, and drive innovation in test strategies for SoC and functional IP blocks.
Key Responsibilities:
Develop logic design, register transfer level (RTL) coding, and implement DFT architectures including SCAN, MBIST, BSCAN, and TAP.
Collaborate in the definition of architecture and microarchitecture features for DFT blocks and subsystems.
Optimize logic to achieve power, performance, area, timing, test coverage, and defect per million (DPM) goals.
Write and generate RTL and structural code for DFT integration, ensuring design integrity for physical implementation.
Review and execute verification plans to ensure design features meet architecture specifications.
Resolve RTL test failures and implement corrective measures to ensure feature correctness.
Support SoC customers for successful integration of DFT blocks, contributing to high-quality IP and SoC designs.
Develop high-volume manufacturing (HVM) test content for rapid bring-up and production deployment on automatic test equipment (ATE).
Collaborate with post-silicon and manufacturing teams to verify features in silicon and support debugging requirements.
Minimum Qualifications:
Bachelor's degree in Computer or Electrical Engineering, or a related field with no prior experience required.
Interest in DFT as a career
This position is based in Fort Collins, Colorado and requires on-site presence 4 days per week at our office location.
Preferred Qualifications:
Familiarity with test architecture including SCAN, MBIST, BSCAN, and TAP.
Familiarity with RTL coding, DFT techniques, and timing closure methods.
Experience with design tools and methodologies such as ATPG and coverage analysis.
Experience configuring EDT setups and resolving stuck-at and at-speed test scenarios.
Proficient programming skills in TCL, Python, Perl, and/or C++.
Knowledge of GLS for test scenario resolution and ATPG coverage analysis.
Strong communication and collaboration skills, with a focus on teamwork across diverse engineering groups.
Join us in advancing Intel's legacy as a technology leader. Apply today to be a part of our journey in innovating the future of silicon design and manufacturing.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 03/31/2026*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.
Intel is hiring a Packaging Module Development Engineer to develop and qualify thermal material and mechanical design solutions for high-volume semiconductor packaging.
Drive process integration and technology transfer at Intel Foundry to turn development innovations into reliable, high-volume semiconductor manufacturing solutions.
Energy Trust of Oregon seeks an Engineer, Planning & Evaluation to perform measure development, cost-benefit analyses, pilot design, and technical review to support cost-effective energy-efficiency programs.
Crusoe is hiring a Senior Manager, Controls Deployment to lead engineering teams deploying high-density EPMS and BMS infrastructure across multi-region construction sites.
Lead development and validation of engine cycle models (NPSS) to shape high-performance turbine engines for Mach Industries' scalable defense platforms.
Lead the design and delivery of complex mixed-signal and RF PCB assemblies for next-generation quantum sensors at Vector Atomic, collaborating across hardware and science teams to drive high-performance instrument development.
SeaWorld San Diego is hiring a Design & Engineering Summer Intern to assist with drafting, document control, project coordination, and procurement while gaining practical engineering and construction-related experience.
Intel is hiring a Packaging Module Development Engineer to develop and qualify thermal material and mechanical design solutions for high-volume semiconductor packaging.
Mach Industries is hiring a Propulsion Performance Engineer to analyze and design rotating and stationary turbine components, guiding structural capability, testing, and rapid iteration for production-grade small turbine engines.
Lead AIM's technical vision and execution as CTO, building and scaling a hardware-software Physical AI platform that deploys autonomous earthmoving fleets into production.
Lead and scale Zapier’s infrastructure and platform engineering organization, driving an AI-first platform strategy that boosts developer velocity, reliability, and product delivery.
Lead the architecture and scaling of production business systems, factory infrastructure, and analytics to enable Reliable Robotics' transition from prototype to certifiable autonomous aircraft production.
Senior Director to lead and grow the Solutions Architecture/Engineering (SASE) team, delivering technical pre-sales support and architecting colocation, networking and hybrid cloud solutions for enterprise and hyperscale customers across North America.
Support utility outage projects across the Western US as a traveling Field Engineer responsible for project execution oversight, safety, subcontract coordination, and client communication.
Blue Origin is hiring a senior fluids systems engineer to lead the design, development, and testing of reaction control and heat exchanger subsystems for the New Glenn upper stage.