Browse 12 exciting jobs hiring in Asic Verification now. Check out companies hiring such as Hewlett Packard Enterprise, PDDN INC., InterImage in New Orleans, Grand Prairie, Atlanta.
HPE is hiring a VLSI Engineer II in Sunnyvale to develop and verify RTL modules and testbenches, leveraging SystemVerilog and verification methodologies to drive ASIC/subsystem validation.
Lead verification efforts for ARM-based CPU, GPU and debug IP blocks in a remote contract role, owning verification plans, UVM environments, testcases and coverage to ensure high-quality SoC designs.
Senior Hardware Design Engineer role focused on ASIC/FPGA/SoC design, verification, and physical implementation for a cleared government-contractor environment.
Drive go-to-market strategy and customer engagements for Cadence’s agentic AI and LLM-enabled EDA products as a technically deep, business-savvy Lead Product Engineer.
Lead verification for next-generation space-qualified ASICs and FPGAs on SpaceX's Starshield program, developing SystemVerilog/UVM testbenches, driving coverage closure, and supporting pre/post-silicon bring-up.
Lead and grow a chiplet verification team at Intel, driving verification strategy and execution for complex ASIC/SoC products using advanced verification methodologies.
Lead and mentor an analog engineering team at Renesas CMSD to define architectures, drive analog/mixed-signal ASIC design and verification, and deliver highly configurable products to market.
Lead development of verification tooling and CI infrastructure to accelerate High-Speed IO ASIC verification for NVIDIA's GPU teams.
Intel is hiring a Design Engineer focused on neuromorphic computing to develop RTL, prototype on FPGA/emulation platforms, and collaborate across architecture, verification, and software teams to bring neuro-inspired silicon to product readiness.
Join Cadence’s elite verification field team to lead emulation and FPGA prototyping deployments, drive technical evaluations, and deliver customer-facing solutions using Palladium and Protium.
SpaceX Starshield is hiring a Principal ASIC Design Verification Engineer to lead SystemVerilog-based verification, drive test plans and regressions, and support pre- and post-silicon validation of next-generation space-qualified ASICs.
SpaceX Starshield is hiring a Sr. ASIC Design Verification Engineer to lead SystemVerilog-based verification and validation of next-generation space and ground ASICs/FPGAs for national security applications.
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