Browse 15 exciting jobs hiring in Cpu now. Check out companies hiring such as Intel, Jump Trading, Airbnb in Norfolk, Tucson, San Jose.
Intel seeks a Senior CPU Power Delivery Engineer to drive PDN design, IR/EM signoff, and cross-functional integration for next-generation CPU cores on a hybrid schedule in Austin.
Intel is hiring a CPU Physical Design Engineer to lead RTL-to-GDS implementation and signoff for E-Core/Atom microprocessors, optimizing power, frequency, and area.
Join Jump Trading Group's Core Development team to design and optimize the low-latency, systems-level infrastructure that powers our global trading platform.
Lead Airbnb's Infrastructure Performance strategy and build the profiling, instrumentation, and organizational practices that make performance a default property of how the company ships software.
Experienced licensing and lifecycle analyst needed to evaluate vendor licensing models, hardware/software dependencies, and develop software roadmaps to optimize capability and cost for federal clients.
Work on CPU pre-silicon validation and post-silicon debug for high-performance, power-efficient cores in Intel's Folsom CPU design team.
A hands-on Junior CPU Design Verification Engineer role at Intel to develop and execute verification plans, run system-level simulations, and debug presilicon CPU designs.
Lead performance engineering for FSI-focused AI and HPC workloads at NVIDIA, optimizing parallel algorithms and GPU/CPU systems to unlock world-class performance.
Intel is hiring a seasoned CPU RTL Design Engineer to drive RTL development, optimization, and microarchitectural specification for cutting-edge processor IP.
Arista Networks is hiring a BIOS Software Engineer in Austin to develop and integrate low-level CPU firmware, BIOS, and boot loader software for production networking platforms.
Lead the design, development and integration of low-level CPU firmware, BIOS and boot loader software for Arista’s networking products, collaborating with hardware teams and upstream open-source communities.
Lead power analysis and low‑power RTL optimization efforts at Intel to reduce dynamic and leakage power and improve overall CPU power efficiency.
Senior RTL Design Engineer needed to develop and optimize RTL for Intel's next-generation CPU microarchitecture, driving high-performance and power-efficient processor features.
Intel's ACE organization is hiring a Design Verification Engineer to create and execute UVM/SystemVerilog verification environments for next-generation CPU designs.
Lead CPU Logic Design Engineer role at Intel driving RTL and microarchitecture development to deliver high-performance, low-power CPU features for SoC integration.
Below 50k*
0
|
50k-100k*
0
|
Over 100k*
6
|