Browse 11 exciting jobs hiring in Interconnect now. Check out companies hiring such as NVIDIA, Crusoe, Jobgether in Laredo, Chandler, Shreveport.
Lead architecture and RTL design efforts for NVIDIA's NVLINK-C2C coherent high-speed interconnects, collaborating across hardware, software and external partners to deliver chiplet-scale connectivity for GPUs, DPUs, and CPUs.
NVIDIA is hiring a Senior I/O Specifications Architect to drive interconnect requirements and standards engagement (PCIe, CXL, UCIe) for next-generation AI and graphics systems.
Crusoe Cloud is hiring a Senior Engineering Manager to lead the design, automation, and evolution of high-performance network fabrics and observability for AI and HPC infrastructure.
Lead standards-driven R&D and product development for high-speed data communication technologies as a remote Senior Engineer, shaping roadmaps and industry specifications.
Senior R&D/Product Developer (remote) focused on high-speed interconnect technologies, standards engagement, and translating specifications into engineering requirements for next‑generation data communication products.
Senior R&D/Product Developer (remote, NJ) to lead standards-driven high-speed interconnect development and translate specifications into engineering requirements.
Lead R&D/Product Engineer to drive high-speed interconnect innovation, represent the company in standards bodies, and translate specifications into product-ready engineering requirements.
Lead product development of high-speed interconnect solutions, representing the company in standards bodies and translating specifications into engineering requirements for market-leading data communication products.
Experienced R&D/Product Developer needed to lead standards engagement and translate high-speed interconnect specifications into engineering requirements for a remote, Florida-based team.
CesiumAstro is hiring a Principal Wire Harness Design Engineer II to lead the design, validation, and production planning of complex power, digital, analog, and RF interconnect systems for space and airborne platforms.
Lead architecture and engineering of chip-to-chip and scale-out interconnects for AI/ML inference systems, driving high-performance, low-power networking solutions and industry-standard contributions.
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