Ic Layout Jobs

Marvell is hiring a Staff Analog Layout Engineer in Santa Clara to lead layout and verification of high-speed and precision analog IP using Cadence Virtuoso across multiple process nodes.

Elevate Semiconductor is hiring a Senior Analog Design Engineer in San Diego to lead design and optimization of high-performance analog CMOS circuits for ATE products.

Senior-level analog/mixed-signal IC design role at a leading semiconductor company working on high-speed circuits, PLLs/clock generation, and data converters.

Mission Driven

Social Impact Driven

Passion for Exploration

Reward & Recognition

Work on cutting-edge RF/analog IC design for Starlink, developing and characterizing SiGe/CMOS RFICs used in space and ground infrastructure.